Exemplary embodiments of the present invention relate to an impedance code generation circuit which generates an impedance code for impedance matching.
A variety of semiconductor devices are implemented with integrated circuit chips. Such semiconductor devices are incorporated into a variety of electrical products, such as personal computers, servers, and workstations. In most cases, semiconductor devices include reception circuits configured to receive a variety of external signals through input pads, and output circuits configured to provide a variety of internal signals through output pads to external circuits.
As the operating speeds of electrical products increase, swing widths of signals transferred between semiconductor devices are gradually reduced in order to minimize delay time necessary for signal transfer. However, as the swing widths of the signals are reduced, influence of external noises is increased, and signal reflection at interface terminals due to impedance mismatching becomes more severe. The impedance mismatching is generally caused by external noises or variations in power supply voltage, operating temperature, or fabrication processes. The impedance mismatching may make it difficult to transfer data at high speed and may distort output data outputted from data output terminals of the semiconductor device. Therefore, where the reception circuit of the semiconductor device receives the distorted output signals through the input terminals, setup/hold fail or incorrect determination of input levels may occur frequently.
In order to address the above concerns, memory devices requiring high-speed operations have adopted impedance matching circuits, called on-die termination (ODT) devices, in the vicinity of pads inside integrated circuit chips. In a typical ODT scheme, a source termination is performed at a transmission side by an output circuit, and a parallel termination is performed at a reception side by a termination circuit, which is coupled in parallel to the reception circuit which is coupled to an input pad.
A ZQ calibration refers to a procedure of generating impedance codes which change according to variations of process, voltage, and temperature (PVT) conditions. A termination impedance value is adjusted using impedance codes generated as a result of ZQ calibration. Generally, a pad to which an external resistor serving as a calibration reference is coupled is referred to as a ZQ pad. For this reason, the term “ZQ calibration” is widely used.
An impedance code generation circuit for generating an impedance code, and a termination circuit for terminating an input/output node by using the generated impedance code is described below.
FIG. 1 is a diagram of a conventional impedance code generation circuit.
Referring to FIG. 1, a conventional calibration circuit includes a pull-up reference impedance unit 110, a dummy reference impedance unit 120, a pull-down reference impedance unit 130, a reference voltage generation unit 102, comparison units 103 and 104, and counter units 105 and 106.
Upon operation of the conventional calibration circuit, the comparison unit 103 compares a voltage of a calibration node B with a reference voltage VREF. The calibration node has a voltage that is generated by voltage division between an external resistor 101 (hereinafter, assumed as 120Ω), which is connected to a calibration pad ZQ, and the pull-up reference impedance unit 110. Meanwhile, the reference voltage VREF (generally, ½*VDDQ) is generated from the reference voltage generating unit 102. As a result of the comparison, the comparison unit 103 generates an up/down signal UP/DOWN.
The counter unit 105 receives the up/down signal UP/DOWN to generate a pull-up impedance code PCODE<0:N>. The generated pull-up impedance code PCODE<0:N> adjusts the total impedance value of the pull-up impedance unit 110 by turning on/off parallel resistors inside the pull-up reference impedance unit 110 (impedance values of the parallel resistors are designed according to binary weights). The adjusted total impedance value of the pull-up reference impedance unit 110 again influences the voltage of the calibration node B, and the above-described operations are repeated. Consequently, the pull-up impedance code PCODE<0:N> is counted until the total impedance value of the pull-up reference impedance unit 110 is equal to the impedance value of the external resistor 101. This operation is referred to as a pull-up calibration operation.
The pull-up impedance code PCODE<0:N> generated by the above-described pull-up calibration operation is inputted to the dummy reference impedance unit 120 and used to determine a total impedance value of the dummy reference impedance unit 120. Subsequently, a pull-down calibration operation is performed. In a manner similar to the pull-up calibration operation, the pull-down calibration operation is performed using the comparison unit 104 and the counter unit 106, so that a voltage of a node A becomes equal to the reference voltage VREF, that is, the total impedance value of the pull-down reference impedance unit 130 becomes equal to the total impedance value of the dummy reference impedance unit 120. This operation is referred to as a pull-down calibration.
The impedance codes PCODE<0:N> and NCODE<0:N> generated as the result of the above-described ZQ calibration operation are inputted to a termination circuit (see FIG. 2) to adjust a termination impedance value.
FIG. 2 is a diagram of a conventional termination circuit.
The termination circuit refers to a circuit which receives the impedance codes PCODE<0:N> and NCODE<0:N> generated from the impedance code generation circuit of FIG. 1 and terminates an interface pad.
The termination circuit includes a pull-up termination unit 210 and a pull-down termination unit 220. The termination circuit may be configured with either the pull-up termination unit 210 or the pull-down termination unit 220 according to the termination scheme.
The pull-up termination unit 210 is designed to have a similar configuration as the pull-up reference impedance unit 110 (see FIG. 1), and receives the pull-up impedance code PCODE<0:N>. Therefore, the pull-up termination unit 210 may have the same impedance value as the pull-up reference impedance unit 110. Although the pull-up termination unit 210 may have the same impedance value (e.g., 240Ω) as the pull-up reference impedance unit 110, it may also be adjusted to have other impedances (e.g., 120Ω or 60Ω) by scaling. A pull-up termination enable signal PU_EN is a signal which turns on/off the pull-up termination unit 210. That is, the turning on/off of the pull-up termination unit 210 is determined by the pull-up termination enable signal PU_EN. The impedance value of the turned-on pull-up termination unit 210 is determined by the pull-up impedance code PCODE<0:N>,
The pull-down termination unit 220 is designed to have a similar configuration as the pull-down reference impedance unit 130 (see FIG. 1), and receives the pull-down impedance code NCODE<0:N>. Therefore, the pull-down termination unit 220 may have the same impedance value as the pull-down reference impedance unit 130. Although the pull-down termination unit 220 may have the same impedance value (e.g., 240Ω) as the pull-down reference impedance unit 130, it may also be adjusted to have other impedances (e.g., 120Ω or 60Ω) by scaling. A pull-down termination enable signal PD_EN is a signal which turns on/off the pull-down termination unit 220. That is, the turning on/off of the pull-down termination unit 220 is determined by the pull-down termination enable signal PD_EN. The impedance value of the turned-on pull-down termination unit 220 is determined by the pull-down impedance code NCODE<0:N>.
The termination circuit may be used as a main driver of an output driver which outputs data. When the pull-up termination enable signal PU_EN is activated, the pull-up termination unit 210 pull-up terminates the interface pad (e.g., a DQ pad) and outputs “high” data through the interface pad. When the pull-down termination enable signal PD_EN is activated, the pull-down termination impedance unit 220 pull-down terminates the interface pad and outputs “low” data through the interface pad.
As a result of the calibration operation of the impedance code generation circuit of FIG. 1, the impedance codes PCODE<0:N> and NCODE<0:N> are generated and inputted to the termination circuit of FIG. 2. The termination circuit of FIG. 2 attempts to obtain a target impedance value, which matches an impedance of the external circuit. However, the impedance value of the termination circuit of FIG. 2 may become greater than or less than the target impedance value.
This occurs when the impedance codes PCODE<0:N> and NCODE<0:N> are incorrectly generated by an error of the impedance code generation circuit of FIG. 1, or when a layout difference occurs between the termination unit of the termination circuit and the reference impedance unit of the impedance code generation circuit even though the impedance codes PCODE<0:N> and NCODE<0:N> are correctly generated. Since such occurrences cannot be entirely eliminated, there is a need for a method which can adjust an impedance code value or an impedance value of a termination circuit.